A.1.2.5 Construct logic diagrams.
• Logic diagrams to demonstrate how logic gates are connected and interact in a circuit.
• Use of standard gate symbols for AND, OR, NOT, NAND, NOR, XOR and XNOR gates
• Inputs processed diagrammatically to produce outputs
• Combinations of these gates to perform more complex logical operations
• Boolean algebra rules to simplify complex logic diagrams and expressions
The big idea
A logic diagram is a schematic that turns a Boolean specification into an explicit network of physical gate symbols. By reading the diagram you can see, at a glance, which signals are combined by which gate and in what order, and by drawing the diagram you fix the exact hardware needed to realise a digital function. The International Baccalaureate syllabus highlights this skill because it is the bridge between abstract truth-table reasoning and real-world circuitry .
1 The standard gate tool-kit
| Gate | Symbol on a diagram | Verbal behaviour |
|---|---|---|
| AND | D-shaped body, two (or more) inputs, flat back | Outputs 1 only when all inputs are 1 |
| OR | Curved body with pointed nose | Outputs 1 when any input is 1 |
| NOT | Small triangle with a bubble on its tip | Inverts the single input bit |
| NAND | AND symbol plus a bubble on the output | Output is 0 only when every input is 1 |
| NOR | OR symbol plus a bubble on the output | Output is 1 only when every input is 0 |
| XOR | OR symbol with an extra “shadow” curve on its input side | Output is 1 when the number of high inputs is odd |
| XNOR | XOR symbol plus a bubble on the output | Output is 1 when inputs are equal |
These seven gates form a complete basis: any finite Boolean function can be built with them, and in practice most libraries restrict fabrication to just two (NAND or NOR) because each of those is itself functionally complete.
2 How to read a logic diagram
- Identify primary inputs and outputs. Conventions vary, but signals usually flow left-to-right.
- Trace the signal paths. Follow each wire through successive gates; intermediate nodes often get labels if the circuit is large.
- Determine gate operation order. The topology fixes evaluation precedence: a gate closer to the inputs computes first.
- Check fan-out and fan-in. One signal can feed many gates (fan-out), and each gate can accept the number of inputs implied by its symbol (fan-in).
Because each gate’s graphic shape encodes its Boolean role, the diagram literally explains itself once you know the icon set.
3 Constructing a diagram from an expression
Suppose the specification is
Alarm = (Door_open AND NOT Window_closed) OR (Motion AND NOT System_disabled)
Step-by-step construction
- Draw two NOT gates to produce
NOT Window_closedandNOT System_disabled. - Feed
Door_openandNOT Window_closedinto an AND gate. - Feed
MotionandNOT System_disabledinto another AND gate. - Feed the two AND outputs into a single OR gate that drives
Alarm.
The result is a four-layer diagram where every gate symbol directly matches a clause in the original sentence.
4 Combining gates for more complex logic
Large functions are built hierarchically:
- Modules. A half-adder (XOR plus AND) can be treated as a single block when designing a full-adder.
- Trees. Wide reductions (e.g., eight-input parity) are drawn as balanced trees of XOR gates to minimise delay.
- Memory elements. By feeding a gate’s output back into itself through controlled paths you move beyond purely combinational logic into latches and flip-flops.
Understanding these patterns lets designers scale from a handful of inputs to the thousands found in ALUs and control units.
5 Simplifying diagrams with Boolean algebra
Every unnecessary gate costs area, power and delay. Core algebraic identities—Idempotent (A OR A = A), Domination (A AND 0 = 0), Absorption (A OR (A AND B) = A)—make it possible to perform paper-and-pencil reductions before committing to silicon.
Worked example
Original expression:
F = (A AND B) OR (A AND NOT B) OR (A AND C)
- Factor out the common
A:F = A AND (B OR NOT B OR C) B OR NOT Bis always 1, so the term in parentheses simplifies to1 OR C, which is 1.- Therefore
F = A.
Gate-count reduction: from three two-input AND gates and one three-input OR gate down to a single wire: the diagram literally collapses to a direct connection from A to F.
The IB syllabus explicitly links the construction of logic diagrams with the algebraic rules used to simplify them .
6 Practical design workflow
| Phase | Activity | Deliverable |
|---|---|---|
| Specification | Write Boolean or natural-language requirement | Formal truth table or equation |
| Initial synthesis | Map each product and sum to gates | Raw diagram (often “sum-of-products”) |
| Optimisation | Apply algebra, Karnaugh maps or software minimisers | Reduced diagram with fewer levels and gates |
| Validation | Simulate or exhaustively test against truth table | Verified gate-level netlist |
| Implementation | Translate symbols into hardware description language or PCB layout | Fabricated circuit or programmable-logic image |
At each pass you may redraw the diagram; clear graphical conventions ensure the improved version remains readable.
Key take-aways
- A logic diagram is the definitive visual representation of a Boolean function.
- Mastery of the seven standard gate symbols is enough to build—and recognise—any combinational circuit you will encounter in first-year computer science.
- Boolean algebra is not just theory: every identity you prove shaves gates off the final hardware, saving cost and energy.
- The ability to move fluently between expression → diagram → simplified diagram is foundational for later topics such as sequential logic, finite-state machines and computer architecture.